1. Field of the Invention
The present invention relates to a system and method for processing a logic function including a plurality of input variables, or an any subset of a set consisting of a plurality of elements, and particularly to a design system and method of a logic circuit which represents a logic function or a subset by using binary decision diagrams including nodes and edges, and simplifies the logic function on the basis of the binary decision diagrams.
2. Description of Related Art
A method referred to as a binary decision diagram is used as one of the methods for representing logic functions (see, R. E. Bryant, "Graph-Based Algorithms for Boolean Function Manipulation", IEEE Trans Comput Vol C-35, No 8, pp. 677-691). This representing method includes the following processings.